1. Technical Field
The present invention relates to a semiconductor memory apparatus, in particular, to a semiconductor memory apparatus that includes sense amplifier arrays having different sensing time.
2. Related Art
A unit memory cell that constitutes a DRAM (Dynamic Random Access Memory) has a drawback in that it is difficult to hold stored data for a predetermined time due to a leakage component of the cell itself. In order to compensate for this data leakage, a system performs a refresh operation that enables the memory to restore data for each predetermined time. The refresh operation includes auto-refresh in which a refresh operation is performed during a normal operation and self-refresh in which the memory is kept to perform a minimum operation, thereby reducing power consumption when the system does not operate for a long time.
That is, the refresh operation is a process of amplifying data stored in a cell by a sense amplifier and storing the amplified data in the cell again.
As shown in FIG. 1, a conventional semiconductor memory apparatus includes a plurality of cell mats 10-1 to 10-4 each having a plurality of memory cells; and a plurality of sense amplifier arrays 20-1 to 20-4, each having a plurality of sense amplifiers for sensing data in the memory cells in response to a power terminal driving signal SAP and a ground terminal driving signal SAN.
The semiconductor memory apparatus activates the plurality of sense amplifier arrays 20-1 to 20-4 in response to the power terminal driving signal SAP and the ground terminal driving signal SAN in a refresh mode. Accordingly, the plurality of sense amplifiers that constitute the plurality of sense amplifier arrays 20-1 to 20-4 are also activated and perform the sensing operation, which causes consumption of a large amount of current.
Further, at a timing where the plurality of sense amplifier arrays 20-1 to 20-4 are simultaneously activated, that is, the sense amplifiers that constitute the plurality of sense amplifier arrays 20-1 to 20-4 perform the sensing operation, current consumption is suddenly increased. Accordingly, an erroneous operation in the semiconductor memory apparatus may occur.
Specifically, in the semiconductor memory apparatus according to the related art, in case of a refresh operation, since a plurality of memory cells are simultaneously driven, an excessive current (hereinafter, referred to as ‘peak current’) instantaneously flows in the semiconductor memory. The peak current causes a drop in the level of external voltage VDD and a bit line precharge voltage VBLP and ground bouncing in a ground voltage VSS. Therefore, there may be a bad effect when the sense amplifiers perform the sensing operation.